Milk-V Launches Milk-V Vega, the World's First RISC-V Open Source 10 Gigabit Ethernet Switch 🚀

Provides open source SDK, U-boot, and Linux Kernel.

See you in #RISCVSummit 2023 China!
#riscv

For more details: community.milkv.io/t/milk-v-launc…

#RISCVSummit rising too high lol

DeepComputing at RISC-V Summit 2023! #RISCV #RISCV Summit #deepcomputing

Milk-V Meles and NAS!

#riscv #riscv summit

Looking to see what #perf_tools is like on a RISC-V laptop at the #RISCVSummit

Life’s a box of chocolates. for us, for RISC-V too #RISCV Summit #RISCV

Day 1 of RISC-V Summit 2023 is so innovative! Come to our booth to check out new and exciting RISC-V products tomorrow. #RISCVSummit

RISC-V SUMMIT is almost here 🚀

Join us tomorrow November 8th in Santa Clara and come pay a visit to our sponsored lounge! Meet our new Technical Steering Committee, learn how we're supporting RISC-V International - and more!

RSVP: hubs.la/Q027WxV40
#riscv summit #riscv

What a fruitful event! See you everyone next year. Don't forget to visit our store and get more information about the innovative RISC-V products. store.deepcomputing.io #riscv #RISCVSummit

We can't wait for next week's RISC-V North America Summit, where we will be presenting our first fully coherent RISC-V Tensor Unit.

Don't miss the Keynote that our CEO and Founder, Roger Espasa, will give during the Summit.

#semidynamics #RISCVSummit #RISCVEverywhere

At the #RISCVSummit this week, Synopsys' John Koeter discussed the need for greater SoC development efficiency & flexibility. The RISC-V ecosystem is rapidly expanding & will help unleash the next wave of semiconductor innovation.

Watch the full keynote: bit.ly/49wGIKz

Today I learned a new acronym ILYA, RISC-V DeepComputing #RISCVSummit #RISCVeverywhere

RISC-V is inevitable. At the #RISCV Summit , RISC-V president, Calista Redmond noted that #RISCV will eventually have the best CPUs, the best software running on them and the best ecosystem of any microprocessor core family. More takeaways from the Summit: bit.ly/3GeDwW2

Plenty of RISC-V Dev boards available. #Riscvsummit

The Ventana Veyron V2 is a 192-core RISC-V server CPU designed for UCIe compute chiplets and domain-specific accelerator silicon integration servethehome.com/ventana-veyron… Ventana Micro Systems RISC-V #RISCVSummit UCIexpress

#RISCVSummit China 2023, I like these slogans! sophgo SiFive 😀

And we’re on! Come visit us at the RISC-V Summit and see how we’re using RISC-V to build worlds most powerful AI processing unit for the Edge! #riscv #RISCVSummit

What a great collaboration on CV-Wally now and in the future. Thanks Simon and all of your unbelievable staff at @ImperasSoftware #RISCV Summit #RISCV

Meet our team of experts at #RISCV Summit , ready to lead your #RISCV project to success. From hardware design to software development, we've got it all covered.

Ready for day 1 at #RISCVSummit with ⁦BeagleBoard.org⁩ #BeagleV -Ahead and #BeagleV -Fire