sh4(@sh4forever) 's Twitter Profile Photo

This tiny circle near the top left is Dragon's first shader executed in real hardware (ULX3S). The shader drew a circle over a single 16x16 region. This was done with a shader core (VPU) attached directly to the main bus. This will be in the GPU soon, and fed from the rasterizer.

This tiny circle near the top left is Dragon's first shader executed in real hardware (ULX3S). The shader drew a circle over a single 16x16 region. This was done with a shader core (VPU) attached directly to the main bus. This will be in the GPU soon, and fed from the rasterizer.
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HDL4FPGA(@HDL4FPGA) 's Twitter Profile Photo

Uploaded a 800x600x24bpp raw image into through USB, utilizing the USB link core. The process completed in 1.969s, achieving a transfer rate of 745,000 Bytes/s github.com/hdl4fpga/hdl4f…

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logic destroyer(@splinedrive) 's Twitter Profile Photo

World's first XV6 RISC-V machines on ECP5 IceSugarPro and ULX3S with 32MiB SDRAM. I don't really know why? :) I will be celebrating all Sunday.

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logic destroyer(@splinedrive) 's Twitter Profile Photo

Okay folks, I will commit the new kernel driver this weekend, plus a pinout for how to connect it with the ULX3S. You can get these parts for 2-3 dollars on AliExpress. Considering that I paid almost 200 euros for my selfmade 5 modules just to operate an ENCx24J600, my SoC will…

Okay folks, I will commit the new kernel driver this weekend, plus a pinout for how to connect it with the ULX3S. You can get these parts for 2-3 dollars on AliExpress. Considering that I paid almost 200 euros for my selfmade 5 modules just to operate an ENCx24J600, my SoC will…
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HDL4FPGA(@HDL4FPGA) 's Twitter Profile Photo

The device communication link for is operational on the board. Here is a real-time configuration handshake capture. I hope it assists others in developing their own USB designs. It would have been helpful for me

The #USB device communication link for #hdl4fpga is operational on the #ULX3S board. Here is a real-time configuration handshake capture. I hope it assists others in developing their own USB designs. It would have been helpful for me
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RegYMM レジム(@regymm0) 's Twitter Profile Photo

Want a quick bitstream without installing toolchains? Try the compiling-as-a-service platform caas.symbioticeda.com !
Xilinx 7-series, Lattice and all supported! Template example for boards including , icebreaker, Arty A7, QMTech 7k325t!

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Will Green(@WillFlux) 's Twitter Profile Photo

It's Friday already! This week, I've got some 1280x720 ULX3S graphics designs for you. Please give them a try and let me know how you get on. This is my first attempt at graphics on ECP5. Radiona_org - Zagreb Makerspace

Find the Verilog source & Makefile in git: github.com/projf/projf-ex…

It's #FPGAFriday already! This week, I've got some 1280x720 ULX3S graphics designs for you. Please give them a try and let me know how you get on. This is my first attempt at graphics on ECP5. #FPGA @RadionaOrg

Find the Verilog source & Makefile in git: github.com/projf/projf-ex…
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はたけやまたかし(@htkymtks) 's Twitter Profile Photo

ULX3S上でZucker SoCが動いた〜。写真はLEDコントロールレジスタに0xAAを出力してるところ。
github.com/machdyne/zucker

ULX3S上でZucker SoCが動いた〜。写真はLEDコントロールレジスタに0xAAを出力してるところ。
github.com/machdyne/zucker
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Rayming PCB & Assembly(@RaymingTech) 's Twitter Profile Photo

If you are looking for an affordable, easy-to-use FPGA development board, then the ulx3s is a great option. In this blog post, we will show you how to get started with using the ulx3s and some of the features that make it a great choice for FPGA

ebics.net/ulx3s/

If you are looking for an affordable, easy-to-use FPGA development board, then the ulx3s is a great option. In this blog post, we will show you how to get started with using the ulx3s and some of the features that make it a great choice for FPGA

ebics.net/ulx3s/
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Will Green(@WillFlux) 's Twitter Profile Photo

Today's lesson: don't ENABLE_PCPI=1 on PicoRV32 for internal plugins. Thank you to the ever-helpful denizens of @[email protected] Discord for untangling this knotty problem.

Now, I can multiply on Radiona_org - Zagreb Makerspace once more.

Today's lesson: don't ENABLE_PCPI=1 on PicoRV32 for internal plugins. Thank you to the ever-helpful denizens of @1bitsquared Discord for untangling this knotty problem.

Now, I can multiply on @RadionaOrg #ULX3S once more. #FPGA #OSHW
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